Non-volatile mass-storage memories are used for computer data and program storage, and for storage applications in consumer products such as digital cameras and audio-video playback and recording devices. These memories can be divided into two broad classes of memory, mechanically addressed memories and electrically addressed memories. Mechanically addressed memories include magnetic and optically based disk drives and tape drives.
The mechanically addressed memories are the least expensive data storage medium in terms of cost per bit of data stored. These devices store data by altering some surface property of a relatively inexpensive storage medium. For example, in optically-based disk drives, the data is organized into a number of concentric tracks on a rotating disk. The surface of the disk is coated with a material whose reflectivity is altered over very small spots that represent the bits of the data being stored. The data is read by measuring the amount of light reflected from each spot. In read/write disks, the data is written by exposing each spot to a laser having a sufficient intensity to alter the reflectivity of the disk coating. Magnetically-based disks operate in an analogous manner using a surface coating that can be magnetized in two different directions.
However, mechanically addressed memories have three drawbacks that limit the use of such memories. First, these memories have a significant delay between the time a request is made to access data on a device and the time the data delivery starts. For example, when a computer requests a data file from a disk drive, the computer must wait for the disk drive to position the read head over the track on which the data is stored and then must wait for the relevant part of the track to rotate to the position of the disk drive. These delays are typically a few milliseconds.
Second, mechanically addressed memories require a significant amount of electrical power. For example, disk drives must provide power for the motor that rotates the disk and power for the actuator that moves the read head with respect to the disk surface. In addition, these drives must provide power for the read/write heads. The high power requirements of such disks cause problems when such memories are incorporated in devices that are battery powered such as digital cameras and laptop computers.
Third, inexpensive mechanically addressed memories are relatively large devices. For example, inexpensive disk drives are much larger than many digital cameras, and hence, cannot be used to store data for such applications without substantially increasing the size of the device. While miniaturized disk drives have been made for such applications, the cost of such miniaturized disk drives is much greater, and hence, limits their usefulness.
Electrically addressed mass storage media overcome, or greatly reduce, the above-described problems. However, the cost of the currently available memories of this type is more than a factor of a hundred more than the cost of storage using mechanically addressed devices. Electrically addressed storage devices such as those used for data storage on digital cameras, are constructed from arrays of semiconductor based storage cells that are organized in a manner similar to that used in computer memories. When a file stored in the memory is to be accessed, the appropriate memory cells are read or written by translating an address to determine a bus line that is powered within the memory. Hence, the delays inherent in the mechanically addressed memories are avoided. In addition, these memories do not require the mechanical components for spinning a disk or moving a read head with respect to the spinning disk, and hence, the size and power requirements are also substantially reduced.
Each storage cell typically has a storage element and an isolation transistor that is used to connect that storage element to a bus for reading and writing the storage element. The storage element, unlike the elements used in computer mass memories, retains the data stored therein when power is turned off. Since each storage cell requires a transistor, the device must be constructed on a silicon wafer in which the isolation transistor is located. Hence, the size of each bit is at least the size of the transistor and, hence, the “storage medium” is semiconductor quality crystalline silicon, which is much more expensive that the storage medium used in mechanically addressed memories.
Furthermore, the currently available electrically addressable memories use storage elements that are also transistors, and hence, the size of each bit is the size of at least two transistors. Accordingly, the size of the storage element is significantly greater than the “spots” on the disks discussed above. This further increases the cost per bit stored.
One type of electrically addressable memory that holds the promise of providing low cost storage utilizes a cross-point array of ferroelectric capacitors to store the data. Each capacitor has a slab of ferroelectric dielectric sandwiched between top and bottom electrodes. The dielectric can be polarized by applying a voltage across the electrodes. When the voltage is removed, the dielectric remains polarized. The direction of polarization is used to store a bit of data, a logical one corresponding to one direction of polarization and a logical zero corresponding to the other direction of polarization. The direction of polarization is set by the relative potentials of the electrodes with respect to one another when the voltage is applied.
The storage cells are typically organized into rectangular arrays having a number of rows and columns. All of the storage cells in a given column are connected to a bus, referred to as a “bit line”. All of the storage cells in each row are connected to a bus, referred to as a “word line”. Data is read and written via the bit lines into storage cells that are identified by potentials on the word lines.
The storage array can be constructed by depositing the conductors that are to become the bit lines on a substrate, depositing a dielectric layer of ferroelectric material over the bit lines, and then depositing the conductors that are to become the word lines over the dielectric layer. The individual capacitors correspond to areas in which the word lines cross the bit lines.
It should be noted that each capacitor does not require an isolation transistor, and hence, the size of a storage cell is determined by the minimum size of the capacitors. The minimum size of the capacitors is determined by the material constants of the dielectrics.
It should also be noted that the storage array does not need to be deposited on an expensive crystalline substrate having an area that is equivalent to that of the storage array. In addition, the storage arrays can be constructed on top of one another to provide stacked structures having very high densities of storage cells.
Data is read from the storage array by applying a potential across the relevant capacitors and observing the amount of charge that is released onto the bit lines. If the applied voltage causes the dielectric to be polarized in a direction opposite to the direction of polarization prior to applying the voltage, the capacitor will release a small charge pulse onto the bit line to which it is connected. If, however, the initial polarization of the dielectric is such that the polarization direction is not “flipped” by the voltage, a much smaller charge pulse will be released to the bit line. These charge pulses are sensed to determine the contents of the selected storage cells.
The minimum size of a storage cell is set by the ability of the read circuitry to differentiate the charge pulses corresponding to ones and zeros. The amount of charge released is, in turn, determined by the size of the capacitor and the material properties of the ferroelectric medium. For currently available ferroelectric materials, the amount of charge released is of the order of 20 fC from a capacitor having an area of 0.0625 μm2.
Since the amount of charge that is to be sensed is very low, these memories are prone to failures that result from other sources of current on the bit lines during the read operation. For example, to provide realistic operating voltages, the thickness of the ferroelectric dielectric layer must be very small. This layer is typically 0.1 μm. Any current path through this layer at the points at which a word line crosses a bit line will result in current flowing from the word line to that bit line during the reading operation. Since the charge being sensed is so low, even very small pinpoint shorts can lead to an inoperative part. The present invention addresses the problems introduced by such shorts.